FPGA Development and Evaluation Board
Indian Space Research Organization
Bid Publish Date
18-Dec-2025, 2:52 pm
Bid End Date
15-Jan-2026, 3:00 pm
Location
Progress
Quantity
5
Bid Type
Two Packet Bid
Public procurement opportunity for Hindustan Aeronautics Limited (hal) FPGA Development and Evaluation Board (Q3) in SULTANPUR, UTTAR PRADESH. Quantity: 5 issued by. Submission Deadline: 15-01-2026 15: 00: 00. View full details and respond.
Indian Space Research Organization
Directorate Of Purchase And Stores
Directorate Of Purchase And Stores
MUMBAI, MAHARASHTRA
N/a
N/a
RAIPUR, CHHATTISGARH
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Certificate (Requested in ATC)
OEM Authorization Certificate
Additional Doc 1 (Requested in ATC)
Additional Doc 2 (Requested in ATC)
Additional Doc 3 (Requested in ATC)
Additional Doc 4 (Requested in ATC) *In case any bidder is seeking exemption from Experience / Turnover Criteria
the supporting documents to prove his eligibility for exemption must be uploaded for evaluation by the buyer
Extended Deadline
15-Jan-2026, 3:00 pm
Opening Date
15-Jan-2026, 3:30 pm
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Main Document
TECHNICAL
ATC
GEM_GENERAL_TERMS_AND_CONDITIONS