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Government Tender Published for Advanced Digital Design with the Verilog HDL by Michael D Ciletti 2nd edition,Design of Analog CMOS in NADIA, WEST BENGAL

Bid Publish Date

08-Feb-2025, 10:32 pm

Bid End Date

03-Mar-2025, 12:00 pm

Progress

Issue08-Feb-2025, 10:32 pm
AwardPending
Explore all 5 tabs to view complete tender details

Quantity

5

Category

Advanced Digital Design with the Verilog HDL by Michael D Ciletti 2nd edition

Bid Type

Single Packet Bid

Categories 4

Indian Institute Of Information Technology (iiit) invites bids for Advanced Digital Design with the Verilog HDL by Michael D Ciletti 2nd edition, Design of Analog CMOS Integrated Circuits by Behzad Razavi, RF Microelectronics by Behzad Razavi, CMOS Circuit Design Layout and Simulation by R Jacob Baker, Electrochemical Methods Fundamentals and Applications by Allen J Bard Larry R Faulkner in NADIA, WEST BENGAL. Quantity: 5. Submission Deadline: 03-03-2025 12: 00: 00. Submit your proposal before the deadline.

Additional Tender Data

Commercial Details

Tender Category

Goods

Bid To RA

No

Bid To RA Enabled

No

Item Category

Advanced Digital Design with the Verilog HDL by Michael D Ciletti 2nd edition , Design of Analog CMOS Integrated Circuits by Behzad Razavi , RF Microelectronics by Behzad Razavi , CMOS Circuit Design Layout and Simulation by R Jacob Baker , Electrochemical Methods Fundamentals and Applications by Allen J Bard Larry R Faulkner

Authority Records

MINISTRY OF EDUCATIONHIGHER EDUCATION DEPARTMENTINDIAN INSTITUTE OF INFORMATION TECHNOLOGY

BID & GeM Expert Consultancy

End-to-end support — bid preparation, GeM registration, document filing & compliance by industry experts.

Bid Preparation GeM Registration Document Filing

Free consultation · 24h response

Documents 4

GeM-Bidding-7498279.pdf

Main Document

BOQ Document

BOQ

BOQ Document

BOQ

GEM General Terms and Conditions Document

GEM_GENERAL_TERMS_AND_CONDITIONS

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Bill of Quantities (BOQ) 5 Items Sign in for GEM prices

#1

Advanced Digital Design with the Verilog HDL by Michael D Ciletti 2nd edition

Detailed Specification Uploaded

1 no Delivery: 30 days
#2

Design of Analog CMOS Integrated Circuits by Behzad Razavi

Detailed Specification Uploaded

1 no Delivery: 30 days
#3

RF Microelectronics by Behzad Razavi

Detailed Specification Uploaded

1 no Delivery: 30 days
#4

CMOS Circuit Design Layout and Simulation by R Jacob Baker

Detailed Specification Uploaded

1 no Delivery: 30 days
#5

Electrochemical Methods Fundamentals and Applications by Allen J Bard Larry R Faulkner

Detailed Specification Uploaded

1 no Delivery: 30 days

Required Documents

1

Certificate (Requested in ATC) *In case any bidder is seeking exemption from Experience / Turnover Criteria

2

the supporting documents to prove his eligibility for exemption must be uploaded for evaluation by the buyer

Financial Results

Rank Seller Price Item
L1
LIRASOFT( MSE Social Category:General )    Under PMA
Item Categories : Advanced Digital Design with the Verilog HDL by Michael D Ciletti 2nd edition,Design of Analog CMOS
L2
CAPITAL BOOKS PRIVATE LIMITED   Under PMA
Item Categories : Advanced Digital Design with the Verilog HDL by Michael D Ciletti 2nd edition,Design of Analog CMOS
L3
INDUSTRUS ENTERPRISES(MSE,MII)( MSE Social Category:General )    Under PMA
Item Categories : Advanced Digital Design with the Verilog HDL by Michael D Ciletti 2nd edition,Design of Analog CMOS
L4
ATR SOLUTIONS (MSE,MII)( MSE Social Category:General )    Under PMA
Item Categories : Advanced Digital Design with the Verilog HDL by Michael D Ciletti 2nd edition,Design of Analog CMOS

Frequently Asked Questions

Key insights about WEST BENGAL tender market

What are the eligibility requirements for participating in this tender?

The eligibility requirements include being a registered entity with valid documentation, compliance with the technical specifications provided in the tender documentation, and a certificate as requested in the ATC document. Additionally, vendors seeking exemption from experience or turnover criteria must upload supporting documentation that proves their eligibility for those exemptions during the evaluation process.

What certificates are required to submit a bid?

Bidders are required to provide certain certificates as delineated in the Additional Technical Conditions (ATC) document. This may include certifications that attest to the authenticity of the educational materials being procured. Any additional documentation requested by the issuing authority must also accompany the bid submission to avoid rejection.

How is the submission process structured for this tender?

The submission process is based on the guidelines set forth in the main tender document. Bidders must ensure that their submissions are in the specified formats outlined in the document. This includes submitting required certificates and the financial quotation, ensuring all documents are accurately filled and submitted by the deadline to facilitate a smooth evaluation process.

What are the financial requirements regarding EMD and performance security?

Bidders must understand that an Earnest Money Deposit (EMD) is usually required to validate their bid submission and demonstrate financial capability. Furthermore, the specifics regarding performance security requirements are delineated in the tender documentation, which highlights regulations regarding payment terms and conditions that all bidders must comply with.

Are there any special provisions for Micro, Small, and Medium Enterprises (MSEs)?

Yes, there are special provisions for Micro, Small, and Medium Enterprises (MSEs) and startups included in this tender. These provisions facilitate their participation by offering exemptions or preference in evaluation criteria, aligning with the ‘Make in India' initiative and enhancing opportunities for local procurement and content compliance.

By adhering to the details outlined in this tender document, interested parties can effectively prepare for their participation in this procurement process.

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