FPGA Development and Evaluation Board
Bharat Heavy Electricals Limited (bhel)
BHOPAL, MADHYA PRADESH
Progress
Quantity
10
Bid Type
Two Packet Bid
Directorate Of Technical Education invites bids for FPGA Development and Evaluation Board (Q3) in SURAT, GUJARAT. Quantity: 10. Submission Deadline: 15-01-2026 12: 00: 00. Submit your proposal before the deadline.
Bharat Heavy Electricals Limited (bhel)
BHOPAL, MADHYA PRADESH
Indian Institute Of Technology (iit)
National Institute Of Electronics And Information Technology - Nielit (formerly Doeacc Society)
Indian Space Research Organization
Directorate Of Purchase And Stores
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Bidder Turnover
Certificate (Requested in ATC)
Additional Doc 1 (Requested in ATC) *In case any bidder is seeking exemption from Experience / Turnover Criteria
the supporting documents to prove his eligibility for exemption must be uploaded for evaluation by the buyer
Extended Deadline
15-Jan-2026, 12:00 pm
Opening Date
15-Jan-2026, 12:30 pm
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Main Document
ATC
GEM_GENERAL_TERMS_AND_CONDITIONS