GEM

Procurement Opportunity: FPGA Development and Evaluation Board in SURAT, GUJARAT

Bid Publish Date

06-Dec-2025, 12:29 pm

Bid End Date

15-Jan-2026, 12:00 pm

Value

₹5,00,000

Latest Corrigendum Available

Progress

Issue06-Dec-2025, 12:29 pm
Corrigendum05-Jan-2026
AwardPending
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Quantity

10

Bid Type

Two Packet Bid

Categories 1

Directorate Of Technical Education invites bids for FPGA Development and Evaluation Board (Q3) in SURAT, GUJARAT. Quantity: 10. Submission Deadline: 15-01-2026 12: 00: 00. Submit your proposal before the deadline.

Past Similar Tenders (Historical Results)

5 found

FPGA Development and Evaluation Board

Bharat Heavy Electricals Limited (bhel)

BHOPAL, MADHYA PRADESH

Posted: 10 September 2025
Closed: 20 September 2025
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FPGA Development and Evaluation Board

Indian Institute Of Technology (iit)

Posted: 5 February 2025
Closed: 21 February 2025
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FPGA Development and Evaluation Board

National Institute Of Electronics And Information Technology - Nielit (formerly Doeacc Society)

Posted: 5 December 2024
Closed: 16 December 2024
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FPGA Development and Evaluation Board

Indian Space Research Organization

Posted: 14 November 2024
Closed: 5 December 2024
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FPGA Development and Evaluation Board

Directorate Of Purchase And Stores

Posted: 26 September 2025
Closed: 18 October 2025
GEM

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Required Documents

1

Bidder Turnover

2

Certificate (Requested in ATC)

3

Additional Doc 1 (Requested in ATC) *In case any bidder is seeking exemption from Experience / Turnover Criteria

4

the supporting documents to prove his eligibility for exemption must be uploaded for evaluation by the buyer

Corrigendum Updates

1 Update
#1

Update

05-Jan-2026

Extended Deadline

15-Jan-2026, 12:00 pm

Opening Date

15-Jan-2026, 12:30 pm