Dielectric Constant and Curie Temperature measurement setup,Milikans Oil drop experimental setup,Fr
Tezpur University
SONITPUR, ASSAM
Progress
Quantity
14
Category
Semiconductor Fabrication Technologies
Bid Type
Two Packet Bid
N/a invites bids for Semiconductor Fabrication Technologies, Processes, Process Materials, Device simulation capability, Physics based Models, Material Library, Thermal Effect Simulation, Optoelectronics Device Simulation, Circuit simulation, Noise simulation, Quantum Mechanical effect simulation, User defined Models and Library elements, Run time interactive tool, Graphical display and analysis tool in GANJAM, ODISHA. Quantity: 14. Submission Deadline: 07-07-2025 18: 00: 00. Submit your proposal before the deadline.
Main Document
BOQ
BOQ
ATC
GEM_GENERAL_TERMS_AND_CONDITIONS
Tezpur University
SONITPUR, ASSAM
Kendriya Vidyalaya Sangathan
JAGATSINGHAPUR, ODISHA
Dr. Ram Manohar Lohia Avadh University Faizabad
FAIZABAD, UTTAR PRADESH
N/a
KANPUR NAGAR, UTTAR PRADESH
N/a
Hamirpur, UTTAR PRADESH
Tender Results
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| Item # | Title | Description | Quantity | Unit | Consignee | Delivery (Days) |
|---|---|---|---|---|---|---|
| 1 | Semiconductor Fabrication Technologies | This software shall be capable of fast and accurate simulation of all critical fabrication processes used in modern semiconductor technologies including RF Devices HEMT FET HBT FET BJT JFET, IGBT SOI TFT FinFET etc Multiple Gate FETs MuGFETS FinFET FlexFET Gate All Around GAA FETs etc IR detector and Sensor devices Solar cells Primarily focused on compound semiconductors | 1 | nos | superintendent_hostel | 30 |
| 2 | Processes | It should possess advanced physical models for following processes Doping diffusion including rapid thermal annealing RTA Ion implantation Oxidation with stress effects Physical etching and deposition eg CVD PVD plasma etching RIE etc Epitaxy and stress formation and strain stress engineering Optical lithography These process models shall be capable of Interactive visualization of 2D structures and distributions as well as 1D cross sections Run time extraction of process parameters Optimization of process flow and calibration of process models Easy creation and modification of process flow input decks including automatic control of layout GDS2 mask sequences | 1 | nos | superintendent_hostel | 30 |
| 3 | Process Materials | It should be capable of providing process simulation for variety of materials used in the semiconductor industry like Silicon IIIV IIIN IIVI IVIV but not limited to Silicon Carbides SiC Compound Semiconductors eg GaN AlGaN GaAs AlGaAs InGaAs InP etc Silicon Silicon Germanium SiGe All Schottky and Ohmic contact metals and dielectric insulating materials used in Semiconductor Nano electronics device technology | 1 | nos | superintendent_hostel | 30 |
| 2 | Device simulation capability | The device simulation software should be capable of Analyzing and characterizing the electrical optical and thermal performance of various devices in 2D and 3D Fully integrated with process simulation software comprehensive visualization package and extensive database of examples Material parameters and physical models for a wide range of Silicon III V III N II VI IV IV like compound semiconductor materials and polymer organic based technologies Compatible with smartSPICE and device other simulators SPICE | 1 | nos | superintendent_hostel | 30 |
| 5 | Physics based Models | It should cater Physics based models like drift diffusion energy balance transport equations surface bulk mobility recombination impact ionization and tunneling models The capabilities of all the physical models should be extended to deep submicron devices The models should be capable to calculate all measurable electrical parameters which include gate and drain characteristics sub threshold leakage substrate currents and punch through voltage breakdown behavior kink and snapback effects low temperature and high temperature operation RF AC parameters and intrinsic switching times Boltzmann and Fermi-Dirac statistics with band gap narrowing | 1 | nos | superintendent_hostel | 30 |
| 6 | Material Library | It shall cover materials as per para 1 3 Library of binary ternary and quaternary semiconductors as well as other important advanced materials along with material parameters Built in materials library that contains parameters for all well-known semiconductor materials | 1 | nos | superintendent_hostel | 30 |
| 7 | Thermal Effect Simulation | It should be able to model heat generation heat flow lattice heating heat sinks and effects of local temperature on physical constant It should provide an ideal environment for design and optimization of power devices Applications include characterization of device design thermal failure analysis and heat sink designs This module should be capable for both 2D and 3D device simulation | 1 | nos | superintendent_hostel | 30 |
| 8 | Optoelectronics Device Simulation | It should be able to model light absorption and photo generation in non planar semiconductor devices It should account for arbitrary topologies internal and external reflections and refractions polarization dependencies and dispersion Optical transfer matrix method and EM wave method for coherence effects in layered devices It should be applicable to a wide array of device technologies including CCDs solar cells photodiodes photoconductors avalanche photodiodes Metal-Semiconductor Metal photodetectors phototransistors microlens coupled detector This module should be capable for both 2D and 3D device simulation | 1 | nos | superintendent_hostel | 30 |
| 9 | Circuit simulation | It should contain physically based devices in addition to compact analytical models It should be compatible to small and large signal analysis of RF devices It should contain Compact analytical models for high power circuits including variety of devices such as diode HEMT bipolar thyristor GTO MOS and IGBT devices This module should be capable for both 2D and 3D device simulation | 1 | nos | superintendent_hostel | 30 |
| 10 | Noise simulation | It should be capable of analyzing small signal noise generated within semiconductor devices It should be capable of characterizing small signal noise sources and extract figure of merit for circuit designThis module shall preferably be capable for noise device simulations | 1 | nos | superintendent_hostel | 30 |
| 11 | Quantum Mechanical effect simulation | It should provide a set of models for simulation of various effects of quantum confinement and quantum transport of carriers in semiconductor devices It should allow quantum mechanical calculation of bound state energies and associated carrier wave functions self consistently with electrostatic potential Should associate with Schrodinger solvers with Non Equilibrium Green Function NEGF Approach in order to model ballistic quantum transport in 2D or cylindrical devices with strong transverse confinement This module should be capable for both 2D and 3D device simulation | 1 | nos | superintendent_hostel | 30 |
| 12 | User defined Models and Library elements | It should have capability of user defined physical models and material parameters via standard language interface eg C C plus etc It should have capability of user defined functions such as doping composition fraction defect density of state temperature and composition dependent band parameters mobility recombination and generation models at run time | 1 | nos | superintendent_hostel | 30 |
| 13 | Run time interactive tool | It should have numerous simulator specific and general debugger style tools such as powerful extract statements GUI based process input line by line runtime execution and intuitive input syntactical error messages Should support str file format for model generation | 1 | nos | superintendent_hostel | 30 |
| 14 | Graphical display and analysis tool | This tool should have following capabilities A powerful tool is required to visualize 1D and 2D or 3D structures produced by TCAD simulators It should provide visualization and graphic features such as pan zoom views labels and multiple plot support Plotting engine should support all common 1D and 2D 3D data views including 2D 3D contour data 2D 3D meshed data smith charts and polar charts Exports data in many common formats jpg png bmp SPICE raw file and CSV for use in reports or by third party tools The simulation result xy type data generated by the software should be in the format compatible for direct export to spreadsheet like MS excel | 1 | nos | superintendent_hostel | 30 |
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Experience Criteria
Past Performance
Bidder Turnover
Certificate (Requested in ATC)
OEM Authorization Certificate
OEM Annual Turnover
Compliance of BoQ specification and supporting document *In case any bidder is seeking exemption from Experience / Turnover Criteria
the supporting documents to prove his eligibility for exemption must be uploaded for evaluation by the buyer
Key insights about ODISHA tender market
The eligibility requirements include being a registered entity, capable of providing the necessary semiconductor fabrication technologies and educational materials as specified. Bidders are required to comply with local laws, demonstrating competence through past performance in similar projects.
Participants must possess relevant certifications that affirm their capability in delivering semiconductor technologies and educational materials. Compliance with industry quality standards and documentation substantiating past projects can enhance the eligibility for consideration.
The registration process involves submitting an application through the official procurement portal and providing necessary documentation as outlined in the tender. Vendors must ensure all paperwork is complete, accurately reflecting their capabilities and compliance with technical specifications.
All submissions should be made in electronic formats accepted by the procurement portal. Typically, this includes PDF and Microsoft Office formats for ease of review and evaluation. Bidders are encouraged to check the portal for any specifications regarding file types and sizes.
Performance security requirements mandate that successful bidders provide a guarantee in the form of a bank guarantee or equivalent financial assurance. This ensures fulfillment of the tender conditions and adherence to delivery timelines, thus safeguarding the interests of the Skill Development and Technical Education Department.
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Main Document
BOQ
BOQ
ATC
GEM_GENERAL_TERMS_AND_CONDITIONS