FPGA Development and Evaluation Board
National Institute Of Technology (nit)
Progress
Quantity
5
Bid Type
Two Packet Bid
Commissionerate Of Technical Education has released a public tender for FPGA Development and Evaluation Board (Q3) in AHMEDABAD, GUJARAT. Quantity: 5. Submission Deadline: 01-12-2025 13: 00: 00. Download documents and apply online.
National Institute Of Technology (nit)
Indian Institute Of Technology (iit)
MEDAK, TELANGANA
Indian Institute Of Technology (iit)
Centre For Development Of Advanced Computing (c-dac)
BANGALORE, KARNATAKA
Indian Institute Of Technology (iit)
WEST DELHI, DELHI
Tender Results
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| Category | Specification | Requirement |
|---|---|---|
| Processor | APU | Dual A9, Quad A53, NA |
| Processor | Main Memory | DDR4, 4GB, 2133 MT/s, upgradeable, DDR3, 512MB, 1066 MT/s, soldered |
| Programmable Logic | # of logic cells | 102K |
| Programmable Logic | # of DSP SLICE | 90, 1920, 2520 |
| Programmable Logic | # of MMCM | 4 |
| Additional Parameters | Additional Info | Manufacturers Authorization Letter, Manufacturers University Program Authorization Letter |
| Warranty/Service | Warranty | 1.0 Or higher |
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Experience Criteria
Past Performance
Bidder Turnover
Certificate (Requested in ATC)
OEM Authorization Certificate
OEM Annual Turnover
Additional Doc 1 (Requested in ATC) *In case any bidder is seeking exemption from Experience / Turnover Criteria
the supporting documents to prove his eligibility for exemption must be uploaded for evaluation by the buyer
Extended Deadline
01-Dec-2025, 1:00 pm
Opening Date
01-Dec-2025, 1:30 pm
Directorate Of Purchase And Stores
Indian Institute Of Technology (iit)
📍 CHENNAI, TAMIL NADU
Directorate Of Employment & Training
📍 NAVSARI, GUJARAT
Government Engineering College Modasa Gandhinagar
National Institute Of Technology (nit)
📍 TIRUCHIRAPPALLI, TAMIL NADU
Access all tender documents at no cost
Main Document
CATALOG Specification
ATC
GEM_GENERAL_TERMS_AND_CONDITIONS
Main Document
CATALOG Specification
ATC
GEM_GENERAL_TERMS_AND_CONDITIONS