FPGA Development and Evaluation Board
Centre For Development Of Advanced Computing (c-dac)
BANGALORE, KARNATAKA
Bid Publish Date
26-Nov-2025, 4:27 pm
Bid End Date
06-Dec-2025, 5:00 pm
Value
₹4,00,000
Location
Progress
Quantity
10
Bid Type
Two Packet Bid
The National Institute Of Electronics And Information Technology (NIELIT) Leh- Jammu & Kashmir invites bids for an FPGA Development and Evaluation Board under the Department Of Electronics And Information Technology. Estimated value is ₹400,000 with no BOQ items listed. The procurement targets a hardware platform featuring APU processing, main memory, and programmable logic with specific logic cell, DSP SLICE, and MMCM considerations. The location is Leh, Jammu & Kashmir (194101), emphasizing a regional capability for high-altitude deployment. A key differentiator is the requirement for a locally supported service center in Ladakh and a one-year warranty. The tender’s scope is hardware procurement and supplier support, with bidders needing to demonstrate compliance and deployment readiness for the intended research/education context.
FPGA development and evaluation board with APU processor capability
Main Memory specification required for target FPGA implementation
# of logic cells
# of DSP SLICE
# of MMCM
Warranty: 1 year
Delivery terms aligned with 25% quantity variation right
Service center in Ladakh mandatory for post-sales support
Compliance with bid terms and training declarations
Quantity may vary up to 25% at contract stage and during currency at same rates
Delivery period adjustments follow the extended-period formula with 30-day minimum
One-year warranty to be issued on company letterhead; training declaration required
Purchaser may adjust quantity by ±25% at contract and during currency, with delivery timing calculated as (Increased quantity ÷ Original quantity) × Original delivery period; minimum 30 days
Bidder must provide a 1 year warranty on official letterhead; post-sales support and training declarations required
Bidder must maintain a service center in Ladakh to enable timely maintenance and support
Experience supplying FPGA development boards or equivalent hardware to government or IT departments
Demonstrated capability to provide service and training in Ladakh
Financial capacity to handle a ₹4,00,000 procurement with warranty commitments
Centre For Development Of Advanced Computing (c-dac)
BANGALORE, KARNATAKA
Indian Institute Of Technology (iit)
WEST DELHI, DELHI
Directorate Of Technical Education
BHAVNAGAR, GUJARAT
N/a
Indian Institute Of Technology (iit)
Tender Results
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| Category | Specification | Requirement |
|---|---|---|
| Processor | APU | Dual A9, Quad A53, NA, RISC-V RV64GC U54 |
| Processor | Main Memory | DDR4, 4GB, 2133 MT/s, upgradeable |
| Programmable Logic | # of logic cells | 13K, 256K, 85K |
| Programmable Logic | # of DSP SLICE | 90 |
| Programmable Logic | # of MMCM | 4 |
| Additional Parameters | Additional Info | Manufacturers Authorization Letter, Manufacturers University Program Authorization Letter |
| Warranty/Service | Warranty | Any applicable numeric value |
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GST registration certificate
Permanent Account Number (PAN) card
Experience certificates for comparable FPGA development board supply
Financial statements (latest balance sheet and P&L) demonstrating financial capacity
EMD documents (if applicable per procurement terms)
Technical bid documentation showing compliance with FPGA board specs
OEM authorizations or authorized distributor letters
Warranty commitment letter (1-year) on bidder letterhead
Declaration of physical training at state of consignee on bidder letterhead
Proof of service center presence in Ladakh (address, contact details)
Key insights about JAMMU AND KASHMIR tender market
Bidders must submit GST, PAN, experience certificates, financial statements, EMD documents if required, and technical compliance showing FPGA board specifications. Include OEM authorizations and a 1-year warranty letter. Ensure declaration of physical training at the state of consignee and establish Ladakh service center details.
Required documents include GST certificate, PAN, experience certificates for similar FPGA hardware, latest financial statements, EMD proof, technical bid demonstrating compliance, OEM authorizations, warranty letter on company letterhead, training declaration, and Ladakh service center proof with address and contact.
Spec includes APU processor category, Main Memory specification, and precise # of logic cells, # of DSP SLICE, and # of MMCM counts. Warranty is 1 year; delivery terms allow ±25% quantity variation at contracted rates; no BOQ items listed.
Delivery must align with the original delivery period, with potential extension per the option clause. If quantity increases, the extended period is calculated as (Increased quantity ÷ Original quantity) × Original delivery period, with a minimum of 30 days; quantity variation allowed up to 25%.
Bidders must provide a 1 year warranty on official letterhead, covering hardware integrity and support. A declaration of training at the state of consignee is also required to accompany warranty documentation.
Yes. The tender requires that the bidder maintains a service center in Ladakh to ensure timely post-sale maintenance and support, with address and contact details supplied in the bid submission.
The tender emphasizes standard-compliant procurement with explicit reference to FPGA hardware categories and AISCs (if applicable). Ensure ISI/AAA/TRTL or equivalent certifications are mentioned in the technical bid along with OEM authorization.
Submit a formal training declaration on company letterhead stating alignment with state of consignee training requirements. Include trainer details, scope, dates, and confirmation of on-site or remote delivery as per bid terms.
Directorate Of Purchase And Stores
Indian Institute Of Technology (iit)
📍 CHENNAI, TAMIL NADU
Directorate Of Employment & Training
📍 NAVSARI, GUJARAT
Government Engineering College Modasa Gandhinagar
National Institute Of Technology (nit)
📍 TIRUCHIRAPPALLI, TAMIL NADU
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Main Document
CATALOG Specification
GEM_GENERAL_TERMS_AND_CONDITIONS
Main Document
CATALOG Specification
GEM_GENERAL_TERMS_AND_CONDITIONS